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n55pxxx data sheet release date: mar . 20 1 7 - 1 - ver sion a 2.1 8 ~ 24 i/o e xpander w ith 256 - l evel pwm o utput n55 pxxx data sheet the information described in this document is the exclusive intellectual property of nuvoton technology corporation and shall not be reproduced without permissi on from nuvoton. nuvoton is providing this document only for reference purposes of peripheral based system design. nuvoton assumes no responsibility for errors or omissions. all data and specifications are subject to change without notice. for additional information or questions, please contact: nuvoton technology corporation. www.nuvoton.com
n55pxxx data sheet release date: mar . 20 1 7 - 2 - ver sion a 2.1 table of contents 1. general description ................................ ................................ ............................... 3 2 . feature s ................................ ................................ ................................ ........................ 3 3. pad description ................................ ................................ ................................ ......... 5 4. block diagram ................................ ................................ ................................ ........... 6 5. electric al characteristics ................................ ................................ ............... 7 5.1 absolute m aximum r atings ................................ ................................ ............... 7 5.2 dc c haracteristics ................................ ................................ .............................. 7 5.3 ac c haracteristics ................................ ................................ .............................. 8 6. reference application circuit ................................ ................................ ....... 10 7. package information ................................ ................................ .......................... 12 8. ordering information ................................ ................................ ......................... 17 9. revision history ................................ ................................ ................................ ..... 18
n55pxxx data sheet release date: mar . 20 1 7 - 3 - ver sion a 2.1 1. g eneral d escription the n55p xxx series is a general purpose program mable i/o device usable with different microprocessors through spi interface. the n55pxxx contains up to three 8 - bit ports ( bpa , bpb and bpc ). there are 8~ 24 i/o pins which may be individually programmed for 6 separate command groups. the n55p xxx features logical operating capability and/or/xor for each bit of internal configuration register to speed up access . these gpio pads can drive led directly with 256 levels of brightness. the n55pxxx series contains following bodies with different gpio pins: part no. gpio i/o port N55P082 8 pads b p b n55p162 16 pads b pa, b p b n55p242 24 pads b pa, b pb, b pc 2. f eature s ? w ide range of operating voltage: ? 2.0 ~ 5.5v ? spi interface in mode 0 ? 4 spi pins for communication ? cs b as chip select pin (low active) ? sck for data sy n chronization (up to 8 mhz) ? mosi for n55p xxx to receive command s and data ? miso for the microcontroller to receive data ? 1 wakeup pad for the microcontroller ? 8~ 24 i/o pads ? b i - directional i / o pads o N55P082: 8 i/o pads o n55p162: 16 i/o pads o n55p242: 24 i/o pads ? s t atus of each pad is independently controlled o input ? floating ? pull high ? pull low ? dynamic pull low
n55pxxx data sheet release date: mar . 20 1 7 - 4 - ver sion a 2.1 ? dynamic pull high o output ? cmos high/low ? inverted cmos high/low ? inverted open - drain nmos output ? open - drain pmos output ? constant sink current output ? a ny pad can be selected for wakeup to work ? speed up ( and / or / xor ) group s to minimize load of mcu ? pwm i/o ? 256 levels output ? internal ring oscillator @ 8 mhz ? 4 c lock source s ? reset management ? power - on reset ? s/w reset ? standby current <1ua ? connection of up to 2 n55p xxx device s
n55pxxx data sheet release date: mar . 20 1 7 - 5 - ver sion a 2.1 3. p ad d escription pad name type power supply description b pa0 ~ b pa7 io vddioa general - purpose io, b pa port. b pb0 ~ b pb7 io vddiob general - purpose io, b pb port. b pc0 ~ b pc7 io vddioc general - purpose io, b pc port. rjpa i vddioa rjpa is connected to an external resistor to set the constant current of b p a port. it can be nc if constant current is not enabled. rjpb i vddiob rjpb is connected to an external resistor to set the constant current of b pb port. it can be nc if constant current is not enabled. rjpc i vddioc rjpc is connected to an external resistor to set the constant current of b pc port. it can be nc if constant current is not enabled. csb i vdd spi spi chip select (low active) sck i vdd spi spi clock mosi i vdd spi spi data input miso o vdd s pi spi data output (clock output if test bit is 1) device i vdd spi device id (floating) wakeup o vdd spi host wakeup vdd p positive power su pply for core logic vddspi p positive power supply for spi pads vss p negative power supply for core logic and spi pads vddioa p positive power supply for bpa port vssioa p negative power supply for bpa port vddiob p positive power supply for bpb port vssiob p negative power supply for bpb port vddioc p positive power supply for bpc port vssioc p ne gative power supply for bpc port
n55pxxx data sheet release date: mar . 20 1 7 - 6 - ver sion a 2.1 4. b lock d iagram csb sck mosi miso spi porta (pwm) 8 bpa device wakeup portb (pwm) 8 bpb portc (pwm) 8 bpc rjpa rjpb rjpc
n55pxxx data sheet release date: mar . 20 1 7 - 7 - ver sion a 2.1 5. e lectrical c haracteristics 5.1 absolute m aximum r atings p arameter s ymbol c onditions r ated v alue u nit power supply vdd ? vss - - 0.3 to +7.0 v input voltage v in all i nputs vss - 0.3 to vdd +0.3 v storage temp. t stg - - 55 to +150 ? c operating temp. t opr - 0 to +70 ? c total m ax. io c urrent i m - - 2 00/ 2 00 ma note: exposure to conditions beyond those listed under the absolute maximum ratings table may adversely affect th e life and reliability of the device. 5.2 dc c haracteristics (v dd ? v ss = 4.5v, t a = 25 ? p arameter s ym . c onditions m in. t yp. m ax . u nit operating v oltage v dd 2. 0 - 5.5 v operating c urrent i op1 v d d =5.5v, clk @8 mhz - 800 ? dd1 v dd =5.5v, cs b =v dd - - 1 ? il v dd =4.5v v ss - 0.3 v dd v input h igh v oltage v ih v dd =4.5v 0.7 v dd - v dd v input p ull - h igh r esistor rph vdd=3.0v 360 450 540 k ? ? ol v dd = 3v, v out = 0.4v 8 - - ma i oh v dd = 3v, v out = 2.6v - 4 - - ma constant o utput l ow c urrent i olc v out = 1.0v, rjpx = 82k ? out = 1.0v, rjpx = 220k ? ? dd = 2.6~4 .5v rjpx = 82k ? C
n55pxxx data sheet release date: mar . 20 1 7 - 8 - ver sion a 2.1 5.3 ac c haracteristics (v dd C v ss = 3.0v, t a = 25 ? c ; unless otherwise specified) p arameter s ym . c onditions m in. t yp. m ax. u nit sck clock f requency f clk - - 8 mhz input r ise t i me t r - - 5 n s input f all t ime t f - - 5 ns sc k h igh t ime t wh 58 - - n s sc k l ow t ime t wl 58 - - n s cs b h igh t ime t cs 100 - - ns cs b s etup t ime t css 50 - - ns cs b h old t ime t csh 50 - - ns data i n s etup t ime t su 5 - - ns data i n h old t ime t h 5 - - ns output v alid t ime t v - - 50 ns output h old t ime t ho 0 - - ns output d isable t ime t dis - - 100 ns output d isable t ime t dis - - 100 ns
n55pxxx data sheet release date: mar . 20 1 7 - 9 - ver sion a 2.1 spi timing c s b c l k m o s i v a l i d d a t a . m i s o . . . . . . . . . . . . . . . . . . . . . . . . . . . . v a l i d d a t a t c s t c s h t d i s t h o t v h z t c s s t w h t w l t s u t h . . . . . . . . . . . . . . . . . . . . . . . . . . . .
n55pxxx data sheet release date: mar . 20 1 7 - 10 - ver sion a 2.1 6. r eference a pplication c ircuit disable c onstant c urrent enab le c onstant c urrent
n55pxxx data sheet release date: mar . 20 1 7 - 11 - ver sion a 2.1 2 x n55pxxx c ascade
n55pxxx data sheet release date: mar . 20 1 7 - 12 - ver sion a 2.1 7. package i nformation n55p242 package pin assignment (lqfp48)
n55pxxx data sheet release date: mar . 20 1 7 - 13 - ver sion a 2.1 n55p242 package dimension (lqfp48)
n55pxxx data sheet release date: mar . 20 1 7 - 14 - ver sion a 2.1 n55p162 package pin assignment (qfn32)
n55pxxx data sheet release date: mar . 20 1 7 - 15 - ver sion a 2.1 N55P082 package pin assignment (qfn32)
n55pxxx data sheet release date: mar . 20 1 7 - 16 - ver sion a 2.1 N55P082, n55p162 package dimension (qfn32 )
n55pxxx data sheet release date: mar . 20 1 7 - 17 - ver sion a 2.1 8. ordering i nformation part no. shape type remark n55p242 h die form 24 i/o n55p242l48 e package form, lqfp4 8 (7 x 7 mm) 24 i/o n55p162 h die form 16 i/o n55p162n32 e package form, qfn32 (4 x 4 mm) 16 i/o N55P082 h die form 8 i/o N55P082n32 e package form, qfn32 (4 x 4 mm) 8 i/o
n55pxxx data sheet release date: mar . 20 1 7 - 18 - ver sion a 2.1 9. r evision h istory version date substantial change s page a1.0 oct. 2016 initia l release all a2.0 jan . 201 7 revise sck clock frequency ac spec add package information 8 12~16 a2.1 mar. 2017 update constant current deviation dc spec 7 important notice nuvoton products are neither intended nor warranted for usage in sys tems or equipment, any malfunction or failure of which may cause loss of human life, bodily injury or severe property damage. such applications are deemed , insecure usage. insecure usage includes, but is not limited to: equipment for surgical implementa tion, atomic energy control instruments, airplane or spaceship instruments, the control or operation of dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all types of safety devices, and other applications intended to support or sustain life. all insecure usage shall be made at customers risk, and in the event that third parties lay claims to nuvoton as a result of customers insecure usage, customer shall indemnify the damages and liabilities thus incurred by nuvot on.

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